Semiconductor Engineering

Performant Side-Channel Resistant RISC-V Core to Secure Neural Network Inference (Northeastern Univ.)

A new technical paper titled “PermuteV: A Performant Side-channel-Resistant RISC-V Core Securing Edge AI Inference” was published by researchers at Northeastern University. “Edge AI inference is ...
Security Boulevard

NDSS 2025 – Defending Against Membership Inference Attacks On Iteratively Pruned Deep Neural Network

Membership Inference Authors, Creators & Presenters: Jing Shang (Beijing Jiaotong University), Jian Wang (Beijing Jiaotong ...
EurekAlert!

Real-time, large-scale graph neural network inference through BingoCGN

BingoCGN employs cross-partition message quantization to summarize inter-partition message flow, which eliminates the need for irregular off-chip memory access and utilizes a fine-grained structured ...
Semiconductor Engineering

Efficient TNN Inference on RISC-V Processing Cores With Minimal HW Overhead

A new technical paper titled “xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems” was published by researchers at ETH Zurich and Universita di Bologna. “Ternary ...